Maxim-Integrated /max78000 /DMA /CH[1] /SRCRLD

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SRCRLD

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ADDR

Description

Source Address Reload Value. The value of this register is loaded into DMA0_SRC upon a count-to-zero condition.

Fields

ADDR

Source Address Reload Value.

Links

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